This project receives funding from the European Union’s Framework Programme Horizon Europe for research, technological development and demonstration under grant agreement ID 101081749.


HORIZON-CL4-2021-SPACE-01-81 – Space technologies for European non-dependence and competitiveness


Nov. 1st, 2022 – Oct. 31st, 2025

COCHISA aims to foster the European non-dependence in terms of critical RF components for space applications.

For this, scalable multi-channel radiation-hard beamforming core-chips operating in X-band (10 GHz) as well as Ka-band (28 GHz) will be developed. The scalable approach will allow to increase the number of beamforming channels as well as to scale the system to higher operational frequencies. COCHISA does not only focus on the IC itself, but also a cost-effective plastic non-hermetic MMIC packaging process supporting space applications by robust encapsulation.
Furthermore, a fully European supply chain for the core-chips will be established, based on the European foundry and packaging partners. This includes the availability of a proven radiation-hard SiGe BiCMOS technology with qualified radiation-hard libraries. Due to the establishment of the European supply chain, the mid-term impact will be the wider use of the European radiation-hard technology, increasing the number of ITAR-free European space-grade components.
A main objective of COCHISA is to reach at least TRL 7 for the developed and packaged X-band core-chip, proven by the scheduled radiation and reliability tests. During the COCHISA project, a dedicated work package will prepare the commercial exploitation and market introduction of the project results, especially to make the developed core-chips available to the European and global space industry.


Highly integrated phased-array antennas are fundamental enablers for space-borne SAR (Synthetic Aperture Radar) satellites for earth observation and for constellations of LEO (Low Earth Orbit) satellites for telecommunications. Core-chips are a key component for active phased-array antennas. They allow the integration of all RF functions needed for antenna beamforming like TX/RX switching, phase shifting, amplitude setting and signal amplification in a single chip. Digital components like serial peripheral interface (SPI) blocks can be additionally integrated, to ease the control of the different analog parts. Thus, core-chips allow to greatly increase the antenna array integration, resulting in a reduction of antenna array size, mass, power consumption and cost. Those are crucial factors for the use of active arrays in general and especially for the use in space applications. Early examples of core-chips for space usage were manufactured using Gallium-Arsenide (GaAs) technology with an enhancement/depletion process.

They were serving a single RF channel. Recent advances of Silicon-Germanium (SiGe) technology are now making it possible to develop integrated multi-channel core-chips to further increase the active antenna array integration. This allows to increase agility and performances in top class satellites, and also to realize small and lightweight active antenna arrays able to serve the growing market of mini/small satellites for LEO constellations.
As of today, several companies outside Europe are providing integrated multi-channel core-chips with the use of technologies and manufacturing all outside the European Union. This leads to a strong dependence of the European space industry on non-European providers. Therefore, the Joint Task Force (JTF) has put RF components needed for electronically steerable antennas into their list of actions for Critical Space Technologies for European Non Dependence in the time-frame of 2021-2023.


The first and main objective of COCHISA is the development of a European multi-channel beamforming core-chip focused on – but not limited to – space applications.

With mentioning a European solution, we refer to a fully European development and manufacturing, meaning that no access to non-European technologies and production facilities is needed. Instead, the complete supply chain from technology development, design, manufacturing and packaging is based on the European partners forming the consortium. The developed core-chips will be free from any International Traffic in Arms Regulations (ITAR), Export Administration regulation (EAR) or similar regulations in other jurisdictions.

The second objective is the core-chip development based on a scalable approach with respect to the number of integrated phase-shifting channels as well as the used frequency band.

Currently, key operating frequency channels for space usage are X-band (10 GHz) for SAR applications and Ka-band (28 GHz) for telecom applications. On the base of a scalable system architecture and topology, COCHISA will design and test two integrated core-chips, one operating in the X-band, the other operating in the Ka-band.

The third objective is the development of a cost-effective non-hermetic plastic MMIC package, providing a robust encapsulation solution to survive being launched into space.

The development of non-hermetic plastic-packaged ICs is a must for low-cost applications, as needed in the New Space application. This objective includes the integration of a MMIC chip-technology deduced for space and RF applications as well as the definition and selection of appropriate packaging materials and tooling, based on European vendors, too.

The fourth objective is to reach technology readiness level (TRL) 7 for the X-band core-chip at the end of the project.

The European core-chip solution needs to be available very soon to foster the European competitiveness and participation in the ongoing commercialization of space. Therefore, the X-band core-chip will reach TRL 7 – a system prototype demonstration in operational environment – at the end of the project. It will have passed all relevant radiation and reliability tests necessary to form a space-grade product.

The fifth objective is to find means to reach radiation-hardness in digital designs without a continuously operating clock, i. e. to enable clocking-free self-correcting features of TMR-flip-flops.

Most concepts for digital radiation-hard designs are based on triple-mode redundancy (TMR). To enable the correction capabilities of TMR, a continuous clocking is necessary. SPI-based digital controllers do usually not provide a continuous clock, so it is necessary to find means to combat with the missing clock.

The sixth objective is the establishment and enduring assurance of a fully European supply chain for the developed core-chips as well as the preparation of a successful exploitation and market introduction.

The technical achievement of TRL 7 for the X-band core-chip is not sufficient to ensure the non-dependence of the European space sector. Instead, it is necessary to establish a complete supply chain for the series production. Furthermore, the exploitation activities needs to be started very soon to allow a fast market introduction after the end of the project.